* TDCDT test
sysclear
archmode esame
r 1a0=00000001800000000000000000000200 # z/Arch restart PSW
r 1d0=0002000180000000000000000000DEAD # z/Arch pgm new PSW
r 200=B7000310     # LCTL R0,R0,CTLR0  Set CR0 bit 45
r 204=4100000C     # LA R0,12          R0=Number of tests
r 208=41100340     # LA R1,TEST1       R1=>Test data table
r 20C=68601000     #A LD F6,0(,R1)     Load FPR6=TESTn
r 210=68D00330     # LD F13,DFP52      Load bit number
r 214=68F00338     # LD F15,DFP01      Load increment
r 218=41200800     # LA R2,X'800'      Set R2 bit52 = 1
r 21C=ED6020000054 #T TDCDT F6,0(,R2)  Test FPR6 using mask in R2
r 222=47400232     # BM X              Branch if bit is set
r 226=B3D2F0DD     # ADTR F13,F13,F15  Add 1 to bit number in FPR13
r 22A=8A200001     # SRA R2,1          Shift bitmask in R2
r 22E=4770021C     # BNZ T             Loop to test next bit
r 232=60D01100     #X STD F13,RESn     Store bit number in result table
r 236=41101008     # LA R1,8(,R1)      R1=>Next TESTn
r 23A=4600020C     # BCT R0,A          Loop to end of table
r 23E=B2B20300     # LPSWE WAITPSW     Load enabled wait PSW
r 300=07020001800000000000000000FED0D0 # WAITPSW Enabled wait state PSW
r 310=00040000     # CTLR0             Control register 0 (bit45 AFP control)
r 314=00000000     # FPCREG            Floating point control register
r 330=2238000000000052 # DFP52 DC DD'52'
r 338=2238000000000001 # DFP01 DC DD'1'
r 340=2238000000000000 # TEST1 DC DD'0' Zero positive (52)
r 348=A238000000000000 # TEST2 DC DD'-0' Zero negative (53)
r 350=0038000000000009 # TEST3 DC DD'9E-384' Subnormal positive (54)
r 358=8038000000000009 # TEST4 DC DD'-9E-384' Subnormal negative (55)
r 360=2238000000000001 # TEST5 DC DD'1' Normal positive (56)
r 368=A238000000000001 # TEST6 DC DD'-1' Normal negative (57)
r 370=7800000000000000 # TEST7 DC DD'INF' Infinity positive (58)
r 378=F800000000000000 # TEST8 DC DD'-INF' Infinity negative (59)
r 380=7C00000000001234 # TEST9 DC DD'QNAN' QNaN positive (60)
r 388=FC0000000000ABCD # TESTA DC DD'-QNAN' QNaN negative (61)
r 390=7E00000000001234 # TESTB DC DD'SNAN' SNaN positive (62)
r 398=FE0000000000ABCD # TESTC DC DD'-SNAN' SNaN negative (63)
restart
pause 1
* Display test data
r 340.60
* Display results
r 440.60
